GENLIB_LOSIG

Langue: en

Version: ASIM/LIP6 (fedora - 05/07/09)

Section: 3 (Bibliothèques de fonctions)

Sommaire

NAME

GENLIB_LOSIG - declare an internal logical signal, or a vector of internal logical signals

SYNOPSYS

 #include <genlib.h>
 void GENLIB_LOSIG(name)
 char *name;
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PARAMETERS

name
Name of a signal to be declared

DESCRIPTION

LOSIG creates the internal signal, or the set of internal signals coresponding to a vector description, represented by name. See BUS(3) and ELM(3) for more details on vectors.
The need for declaring signal is mostly felt when one wants to create a consistent vector declaration, for file formats that do not allow partial or multiple declarations, like vhdl. This way, a user can create a vector and access its member the way he wants, but still having an internal consistent form.
Warning
If a signal is declared with LOSIG, but not used, the resulting file will have an internal node floating. This is not an error from a genlib point of view, so the user must be aware of it.

EXAMPLE

 #include <genlib.h>
 main()
 {
         /* Create a figure to work on  */
         GENLIB_DEF_LOFIG("cell");
         /* Define interface *
         GENLIB_LOCON(...
         /* declare buses */
         GENLIB_LOSIG("grum[23:0]");
         GENLIB_LOSIG("iconection[0:7]");
         /* Place an instance */
         GENLIB_LOINS("no2_y" ,"no3" ,"grum[12]" ,"a9_s" ,"new_no3_s" ,"vdd" ,"vss" ,0);
         GENLIB_LOINS("no2_y" ,"no4" ,"a12_s" ,"grum[6]" ,"no4_s" ,"vdd" ,"vss" ,0);
         GENLIB_LOINS("a2_y" ,"a22" ,"no3_s" ,"grum[15]" ,"a22_s" ,"vdd" ,"vss" ,0);
         /* Save all that on disk */
         GENLIB_SAVE_LOFIG();
 }

SEE ALSO

genlib(1), GENLIB_LOINS(3), GENLIB_LOCON(3), GENLIB_BUS(3), GENLIB_ELM(3).
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